[STATEMENT]
lemma write_cpu_PSR_icc_privilege:
assumes a1: "s' = snd (fst (write_cpu (update_PSR_icc n_val z_val v_val c_val
                                        (cpu_reg_val PSR s))
                                      PSR
  (s::(('a::len) sparc_state))))
  \<and> (((get_S (cpu_reg_val PSR s)))::word1) = 0"
shows "(((get_S (cpu_reg_val PSR s')))::word1) = 0"
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. get_S (cpu_reg_val PSR s') = 0
[PROOF STEP]
using a1
[PROOF STATE]
proof (prove)
using this:
s' = snd (fst (write_cpu (update_PSR_icc n_val z_val v_val c_val (cpu_reg_val PSR s)) PSR s)) \<and> get_S (cpu_reg_val PSR s) = 0

goal (1 subgoal):
 1. get_S (cpu_reg_val PSR s') = 0
[PROOF STEP]
apply (simp add: write_cpu_def)
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. s' = snd (fst (modify (cpu_reg_mod (update_PSR_icc n_val z_val v_val c_val (cpu_reg_val PSR s)) PSR) s)) \<and> get_S (cpu_reg_val PSR s) = 0 \<Longrightarrow> get_S (cpu_reg_val PSR (snd (fst (modify (cpu_reg_mod (update_PSR_icc n_val z_val v_val c_val (cpu_reg_val PSR s)) PSR) s)))) = 0
[PROOF STEP]
apply (simp add: simpler_modify_def)
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. s' = cpu_reg_mod (update_PSR_icc n_val z_val v_val c_val (cpu_reg_val PSR s)) PSR s \<and> get_S (cpu_reg_val PSR s) = 0 \<Longrightarrow> get_S (cpu_reg_val PSR (cpu_reg_mod (update_PSR_icc n_val z_val v_val c_val (cpu_reg_val PSR s)) PSR s)) = 0
[PROOF STEP]
apply (simp add: cpu_reg_mod_def update_PSR_icc_def)
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg_val PSR s AND 4279238655 OR (if n_val = 0 then 0 else 8388608)) OR (if z_val = 0 then 0 else 4194304)) OR (if v_val = 0 then 0 else 2097152)) OR (if c_val = 0 then 0 else 1048576))\<rparr> \<and> get_S (cpu_reg_val PSR s) = 0 \<Longrightarrow> (n_val = 0 \<longrightarrow> (z_val = 0 \<longrightarrow> (v_val = 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg_val PSR s AND 4279238655)\<rparr>)) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg_val PSR s AND 4279238655 OR 1048576)\<rparr>)) = 0)) \<and> (v_val \<noteq> 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg_val PSR s AND 4279238655 OR 2097152)\<rparr>)) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg_val PSR s AND 4279238655 OR 2097152) OR 1048576)\<rparr>)) = 0))) \<and> (z_val \<noteq> 0 \<longrightarrow> (v_val = 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg_val PSR s AND 4279238655 OR 4194304)\<rparr>)) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg_val PSR s AND 4279238655 OR 4194304) OR 1048576)\<rparr>)) = 0)) \<and> (v_val \<noteq> 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg_val PSR s AND 4279238655 OR 4194304) OR 2097152)\<rparr>)) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg_val PSR s AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>)) = 0)))) \<and> (n_val \<noteq> 0 \<longrightarrow> (z_val = 0 \<longrightarrow> (v_val = 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg_val PSR s AND 4279238655 OR 8388608)\<rparr>)) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg_val PSR s AND 4279238655 OR 8388608) OR 1048576)\<rparr>)) = 0)) \<and> (v_val \<noteq> 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg_val PSR s AND 4279238655 OR 8388608) OR 2097152)\<rparr>)) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg_val PSR s AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>)) = 0))) \<and> (z_val \<noteq> 0 \<longrightarrow> (v_val = 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg_val PSR s AND 4279238655 OR 8388608) OR 4194304)\<rparr>)) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg_val PSR s AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>)) = 0)) \<and> (v_val \<noteq> 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg_val PSR s AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>)) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (cpu_reg_val PSR (s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg_val PSR s AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>)) = 0))))
[PROOF STEP]
apply (simp add: cpu_reg_val_def)
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR (if n_val = 0 then 0 else 8388608)) OR (if z_val = 0 then 0 else 4194304)) OR (if v_val = 0 then 0 else 2097152)) OR (if c_val = 0 then 0 else 1048576))\<rparr> \<and> get_S (cpu_reg s PSR) = 0 \<Longrightarrow> (n_val = 0 \<longrightarrow> (z_val = 0 \<longrightarrow> (v_val = 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg s PSR AND 4279238655) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 1048576) = 0)) \<and> (v_val \<noteq> 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 2097152) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576) = 0))) \<and> (z_val \<noteq> 0 \<longrightarrow> (v_val = 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0)) \<and> (v_val \<noteq> 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0)))) \<and> (n_val \<noteq> 0 \<longrightarrow> (z_val = 0 \<longrightarrow> (v_val = 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0)) \<and> (v_val \<noteq> 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0))) \<and> (z_val \<noteq> 0 \<longrightarrow> (v_val = 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0)) \<and> (v_val \<noteq> 0 \<longrightarrow> (c_val = 0 \<longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0) \<and> (c_val \<noteq> 0 \<longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0))))
[PROOF STEP]
apply auto
[PROOF STATE]
proof (prove)
goal (16 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 2097152) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
A total of 16 subgoals...
[PROOF STEP]
using update_PSR_icc_1
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0

goal (16 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 2097152) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
A total of 16 subgoals...
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (15 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 2097152) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
A total of 15 subgoals...
[PROOF STEP]
using update_PSR_icc_1 and_num_1048576_128 and_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
1048576 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<Longrightarrow> get_S (?w1.0 AND 4279238655 OR ?w2.0) = 0

goal (15 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 2097152) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
A total of 15 subgoals...
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (14 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 2097152) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
A total of 14 subgoals...
[PROOF STEP]
using update_PSR_icc_1 and_num_2097152_128 and_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
2097152 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<Longrightarrow> get_S (?w1.0 AND 4279238655 OR ?w2.0) = 0

goal (14 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 2097152) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
A total of 14 subgoals...
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (13 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
A total of 13 subgoals...
[PROOF STEP]
using update_PSR_icc_1 and_num_1048576_128 and_num_2097152_128
            and_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
1048576 AND 128 = 0
2097152 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<Longrightarrow> get_S ((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) = 0

goal (13 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 2097152) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
A total of 13 subgoals...
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (12 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
A total of 12 subgoals...
[PROOF STEP]
using update_PSR_icc_1 and_num_4194304_128 and_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
4194304 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<Longrightarrow> get_S (?w1.0 AND 4279238655 OR ?w2.0) = 0

goal (12 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 4194304) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
A total of 12 subgoals...
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (11 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
A total of 11 subgoals...
[PROOF STEP]
using update_PSR_icc_1 and_num_1048576_128 and_num_4194304_128
          and_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
1048576 AND 128 = 0
4194304 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<Longrightarrow> get_S ((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) = 0

goal (11 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
A total of 11 subgoals...
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (10 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_2097152_128 and_num_4194304_128
         and_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
2097152 AND 128 = 0
4194304 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<Longrightarrow> get_S ((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) = 0

goal (10 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 10. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (9 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_1048576_128 and_num_2097152_128 and_num_4194304_128
        and_or_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
1048576 AND 128 = 0
2097152 AND 128 = 0
4194304 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<and> ?w4.0 AND 128 = 0 \<Longrightarrow> get_S (((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) OR ?w4.0) = 0

goal (9 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val = 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 4194304) OR 2097152) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 9. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (8 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_8388608_128 and_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
8388608 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<Longrightarrow> get_S (?w1.0 AND 4279238655 OR ?w2.0) = 0

goal (8 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := cpu_reg s PSR AND 4279238655 OR 8388608)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (cpu_reg s PSR AND 4279238655 OR 8388608) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 8. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (7 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_1048576_128 and_num_8388608_128
      and_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
1048576 AND 128 = 0
8388608 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<Longrightarrow> get_S ((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) = 0

goal (7 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 7. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (6 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_2097152_128 and_num_8388608_128
     and_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
2097152 AND 128 = 0
8388608 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<Longrightarrow> get_S ((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) = 0

goal (6 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 6. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (5 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_1048576_128 and_num_2097152_128 and_num_8388608_128
    and_or_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
1048576 AND 128 = 0
2097152 AND 128 = 0
8388608 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<and> ?w4.0 AND 128 = 0 \<Longrightarrow> get_S (((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) OR ?w4.0) = 0

goal (5 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val = 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 2097152) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 5. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (4 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_4194304_128 and_num_8388608_128
   and_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
4194304 AND 128 = 0
8388608 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<Longrightarrow> get_S ((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) = 0

goal (4 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 4. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (3 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_1048576_128 and_num_4194304_128 and_num_8388608_128
  and_or_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
1048576 AND 128 = 0
4194304 AND 128 = 0
8388608 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<and> ?w4.0 AND 128 = 0 \<Longrightarrow> get_S (((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) OR ?w4.0) = 0

goal (3 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val = 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 1048576) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 3. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (2 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_2097152_128 and_num_4194304_128 and_num_8388608_128
 and_or_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
2097152 AND 128 = 0
4194304 AND 128 = 0
8388608 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<and> ?w4.0 AND 128 = 0 \<Longrightarrow> get_S (((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) OR ?w4.0) = 0

goal (2 subgoals):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := ((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val = 0\<rbrakk> \<Longrightarrow> get_S (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) = 0
 2. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
apply blast
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
using update_PSR_icc_1 and_num_1048576_128 and_num_2097152_128 and_num_4194304_128
and_num_8388608_128 and_or_or_or_or_s
[PROOF STATE]
proof (prove)
using this:
?w' = ?w AND 4279238655 \<and> get_S ?w = 0 \<Longrightarrow> get_S ?w' = 0
1048576 AND 128 = 0
2097152 AND 128 = 0
4194304 AND 128 = 0
8388608 AND 128 = 0
get_S ?w1.0 = 0 \<and> ?w2.0 AND 128 = 0 \<and> ?w3.0 AND 128 = 0 \<and> ?w4.0 AND 128 = 0 \<and> ?w5.0 AND 128 = 0 \<Longrightarrow> get_S ((((?w1.0 AND 4279238655 OR ?w2.0) OR ?w3.0) OR ?w4.0) OR ?w5.0) = 0

goal (1 subgoal):
 1. \<lbrakk>s' = s\<lparr>cpu_reg := (cpu_reg s)(PSR := (((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576)\<rparr>; get_S (cpu_reg s PSR) = 0; n_val \<noteq> 0; z_val \<noteq> 0; v_val \<noteq> 0; c_val \<noteq> 0\<rbrakk> \<Longrightarrow> get_S ((((cpu_reg s PSR AND 4279238655 OR 8388608) OR 4194304) OR 2097152) OR 1048576) = 0
[PROOF STEP]
by blast


[STATEMENT]
lemma simple_cg_merge_validity :
  assumes "observable M1" and "observable M2"
  and     "converge M1 u' v' \<and> converge M2 u' v'"
  and     "\<And> x2 u v . x2 \<in> list.set g \<Longrightarrow> u |\<in>| x2 \<Longrightarrow> v |\<in>| x2 \<Longrightarrow> u \<in> L M1 \<Longrightarrow> u \<in> L M2 \<Longrightarrow> converge M1 u v \<and> converge M2 u v"
  and     "x2 \<in> list.set (simple_cg_merge g u' v')"
  and     "u |\<in>| x2"
  and     "v |\<in>| x2"
  and     "u \<in> L M1"
  and     "u \<in> L M2"
shows "converge M1 u v \<and> converge M2 u v"
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
proof -
[PROOF STATE]
proof (state)
goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
have "(\<And>x2 u v. x2 \<in> list.set ({|u',v'|}#g) \<Longrightarrow> u |\<in>| x2 \<Longrightarrow> v |\<in>| x2 \<Longrightarrow> u \<in> L M1 \<Longrightarrow> u \<in> L M2 \<Longrightarrow> converge M1 u v \<and> converge M2 u v)"
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. \<And>x2 u v. \<lbrakk>x2 \<in> list.set ({|u', v'|} # g); u |\<in>| x2; v |\<in>| x2; u \<in> L M1; u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
proof -
[PROOF STATE]
proof (state)
goal (1 subgoal):
 1. \<And>x2 u v. \<lbrakk>x2 \<in> list.set ({|u', v'|} # g); u |\<in>| x2; v |\<in>| x2; u \<in> L M1; u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
fix x2 u v
[PROOF STATE]
proof (state)
goal (1 subgoal):
 1. \<And>x2 u v. \<lbrakk>x2 \<in> list.set ({|u', v'|} # g); u |\<in>| x2; v |\<in>| x2; u \<in> L M1; u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
assume "x2 \<in> list.set ({|u',v'|}#g)" and "u |\<in>| x2" and "v |\<in>| x2" and "u \<in> L M1" and "u \<in> L M2"
[PROOF STATE]
proof (state)
this:
x2 \<in> list.set ({|u', v'|} # g)
u |\<in>| x2
v |\<in>| x2
u \<in> L M1
u \<in> L M2

goal (1 subgoal):
 1. \<And>x2 u v. \<lbrakk>x2 \<in> list.set ({|u', v'|} # g); u |\<in>| x2; v |\<in>| x2; u \<in> L M1; u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
then
[PROOF STATE]
proof (chain)
picking this:
x2 \<in> list.set ({|u', v'|} # g)
u |\<in>| x2
v |\<in>| x2
u \<in> L M1
u \<in> L M2
[PROOF STEP]
consider "x2 = {|u',v'|}" | "x2 \<in> list.set g"
[PROOF STATE]
proof (prove)
using this:
x2 \<in> list.set ({|u', v'|} # g)
u |\<in>| x2
v |\<in>| x2
u \<in> L M1
u \<in> L M2

goal (1 subgoal):
 1. \<lbrakk>x2 = {|u', v'|} \<Longrightarrow> thesis; x2 \<in> list.set g \<Longrightarrow> thesis\<rbrakk> \<Longrightarrow> thesis
[PROOF STEP]
by auto
[PROOF STATE]
proof (state)
this:
\<lbrakk>x2 = {|u', v'|} \<Longrightarrow> ?thesis; x2 \<in> list.set g \<Longrightarrow> ?thesis\<rbrakk> \<Longrightarrow> ?thesis

goal (1 subgoal):
 1. \<And>x2 u v. \<lbrakk>x2 \<in> list.set ({|u', v'|} # g); u |\<in>| x2; v |\<in>| x2; u \<in> L M1; u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
then
[PROOF STATE]
proof (chain)
picking this:
\<lbrakk>x2 = {|u', v'|} \<Longrightarrow> ?thesis; x2 \<in> list.set g \<Longrightarrow> ?thesis\<rbrakk> \<Longrightarrow> ?thesis
[PROOF STEP]
show "converge M1 u v \<and> converge M2 u v"
[PROOF STATE]
proof (prove)
using this:
\<lbrakk>x2 = {|u', v'|} \<Longrightarrow> ?thesis; x2 \<in> list.set g \<Longrightarrow> ?thesis\<rbrakk> \<Longrightarrow> ?thesis

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
proof cases
[PROOF STATE]
proof (state)
goal (2 subgoals):
 1. x2 = {|u', v'|} \<Longrightarrow> converge M1 u v \<and> converge M2 u v
 2. x2 \<in> list.set g \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
case 1
[PROOF STATE]
proof (state)
this:
x2 = {|u', v'|}

goal (2 subgoals):
 1. x2 = {|u', v'|} \<Longrightarrow> converge M1 u v \<and> converge M2 u v
 2. x2 \<in> list.set g \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
then
[PROOF STATE]
proof (chain)
picking this:
x2 = {|u', v'|}
[PROOF STEP]
have "u \<in> {u',v'}" and "v \<in> {u',v'}"
[PROOF STATE]
proof (prove)
using this:
x2 = {|u', v'|}

goal (1 subgoal):
 1. u \<in> {u', v'} &&& v \<in> {u', v'}
[PROOF STEP]
using \<open>u |\<in>| x2\<close> \<open>v |\<in>| x2\<close>
[PROOF STATE]
proof (prove)
using this:
x2 = {|u', v'|}
u |\<in>| x2
v |\<in>| x2

goal (1 subgoal):
 1. u \<in> {u', v'} &&& v \<in> {u', v'}
[PROOF STEP]
by auto
[PROOF STATE]
proof (state)
this:
u \<in> {u', v'}
v \<in> {u', v'}

goal (2 subgoals):
 1. x2 = {|u', v'|} \<Longrightarrow> converge M1 u v \<and> converge M2 u v
 2. x2 \<in> list.set g \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
then
[PROOF STATE]
proof (chain)
picking this:
u \<in> {u', v'}
v \<in> {u', v'}
[PROOF STEP]
show ?thesis
[PROOF STATE]
proof (prove)
using this:
u \<in> {u', v'}
v \<in> {u', v'}

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
using assms(3)
[PROOF STATE]
proof (prove)
using this:
u \<in> {u', v'}
v \<in> {u', v'}
converge M1 u' v' \<and> converge M2 u' v'

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
by (cases "u = u'"; cases "v = v'"; auto)
[PROOF STATE]
proof (state)
this:
converge M1 u v \<and> converge M2 u v

goal (1 subgoal):
 1. x2 \<in> list.set g \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
next
[PROOF STATE]
proof (state)
goal (1 subgoal):
 1. x2 \<in> list.set g \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
case 2
[PROOF STATE]
proof (state)
this:
x2 \<in> list.set g

goal (1 subgoal):
 1. x2 \<in> list.set g \<Longrightarrow> converge M1 u v \<and> converge M2 u v
[PROOF STEP]
then
[PROOF STATE]
proof (chain)
picking this:
x2 \<in> list.set g
[PROOF STEP]
show ?thesis
[PROOF STATE]
proof (prove)
using this:
x2 \<in> list.set g

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
using assms(4) \<open>u |\<in>| x2\<close> \<open>v |\<in>| x2\<close> \<open>u \<in> L M1\<close> \<open>u \<in> L M2\<close>
[PROOF STATE]
proof (prove)
using this:
x2 \<in> list.set g
\<lbrakk>?x2.0 \<in> list.set g; ?u |\<in>| ?x2.0; ?v |\<in>| ?x2.0; ?u \<in> L M1; ?u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 ?u ?v \<and> converge M2 ?u ?v
u |\<in>| x2
v |\<in>| x2
u \<in> L M1
u \<in> L M2

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
by blast
[PROOF STATE]
proof (state)
this:
converge M1 u v \<and> converge M2 u v

goal:
No subgoals!
[PROOF STEP]
qed
[PROOF STATE]
proof (state)
this:
converge M1 u v \<and> converge M2 u v

goal:
No subgoals!
[PROOF STEP]
qed
[PROOF STATE]
proof (state)
this:
\<lbrakk>?x2.0 \<in> list.set ({|u', v'|} # g); ?u |\<in>| ?x2.0; ?v |\<in>| ?x2.0; ?u \<in> L M1; ?u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 ?u ?v \<and> converge M2 ?u ?v

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
moreover
[PROOF STATE]
proof (state)
this:
\<lbrakk>?x2.0 \<in> list.set ({|u', v'|} # g); ?u |\<in>| ?x2.0; ?v |\<in>| ?x2.0; ?u \<in> L M1; ?u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 ?u ?v \<and> converge M2 ?u ?v

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
have "x2 \<in> list.set (simple_cg_closure ({|u',v'|}#g))"
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. x2 \<in> list.set (simple_cg_closure ({|u', v'|} # g))
[PROOF STEP]
using assms(5)
[PROOF STATE]
proof (prove)
using this:
x2 \<in> list.set (simple_cg_merge g u' v')

goal (1 subgoal):
 1. x2 \<in> list.set (simple_cg_closure ({|u', v'|} # g))
[PROOF STEP]
by auto
[PROOF STATE]
proof (state)
this:
x2 \<in> list.set (simple_cg_closure ({|u', v'|} # g))

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
ultimately
[PROOF STATE]
proof (chain)
picking this:
\<lbrakk>?x2.0 \<in> list.set ({|u', v'|} # g); ?u |\<in>| ?x2.0; ?v |\<in>| ?x2.0; ?u \<in> L M1; ?u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 ?u ?v \<and> converge M2 ?u ?v
x2 \<in> list.set (simple_cg_closure ({|u', v'|} # g))
[PROOF STEP]
show ?thesis
[PROOF STATE]
proof (prove)
using this:
\<lbrakk>?x2.0 \<in> list.set ({|u', v'|} # g); ?u |\<in>| ?x2.0; ?v |\<in>| ?x2.0; ?u \<in> L M1; ?u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 ?u ?v \<and> converge M2 ?u ?v
x2 \<in> list.set (simple_cg_closure ({|u', v'|} # g))

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
using simple_cg_closure_validity[OF assms(1,2) _ _ assms(6,7,8,9)]
[PROOF STATE]
proof (prove)
using this:
\<lbrakk>?x2.0 \<in> list.set ({|u', v'|} # g); ?u |\<in>| ?x2.0; ?v |\<in>| ?x2.0; ?u \<in> L M1; ?u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 ?u ?v \<and> converge M2 ?u ?v
x2 \<in> list.set (simple_cg_closure ({|u', v'|} # g))
\<lbrakk>\<And>x2 u v. \<lbrakk>x2 \<in> list.set ?g; u |\<in>| x2; v |\<in>| x2; u \<in> L M1; u \<in> L M2\<rbrakk> \<Longrightarrow> converge M1 u v \<and> converge M2 u v; x2 \<in> list.set (simple_cg_closure ?g)\<rbrakk> \<Longrightarrow> converge M1 u v \<and> converge M2 u v

goal (1 subgoal):
 1. converge M1 u v \<and> converge M2 u v
[PROOF STEP]
by blast
[PROOF STATE]
proof (state)
this:
converge M1 u v \<and> converge M2 u v

goal:
No subgoals!
[PROOF STEP]
qed


[STATEMENT]
lemma CallParamsThrow'_new: (* requires inverse map Val and append *)
  "\<lbrakk> P,E \<turnstile> \<langle>e,s0\<rangle> \<Rightarrow>' \<langle>Val v,s1\<rangle>; P,E \<turnstile> \<langle>es,s1\<rangle> [\<Rightarrow>'] \<langle>evs,s2\<rangle>;
     map_val2 evs vs (throw ex # es') \<rbrakk>
   \<Longrightarrow> P,E \<turnstile> \<langle>Call e Copt M es,s0\<rangle> \<Rightarrow>' \<langle>throw ex,s2\<rangle>"
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. \<lbrakk>P,E \<turnstile> \<langle>e,s0\<rangle> \<Rightarrow>' \<langle>Val v,s1\<rangle>; P,E \<turnstile> \<langle>es,s1\<rangle> [\<Rightarrow>'] \<langle>evs,s2\<rangle>; map_val2 evs vs (throw ex # es')\<rbrakk> \<Longrightarrow> P,E \<turnstile> \<langle>Call e Copt M es,s0\<rangle> \<Rightarrow>' \<langle>throw ex,s2\<rangle>
[PROOF STEP]
apply transfer
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. \<And>P E e s0 v s1 es evs s2 vs ex es' Copt M. \<lbrakk>P,E \<turnstile> \<langle>e,s0\<rangle> \<Rightarrow> \<langle>Val v,s1\<rangle>; P,E \<turnstile> \<langle>es,s1\<rangle> [\<Rightarrow>] \<langle>evs,s2\<rangle>; map_val2 evs vs (throw ex # es')\<rbrakk> \<Longrightarrow> P,E \<turnstile> \<langle>Call e Copt M es,s0\<rangle> \<Rightarrow> \<langle>throw ex,s2\<rangle>
[PROOF STEP]
apply(rule eval_evals.CallParamsThrow, assumption+)
[PROOF STATE]
proof (prove)
goal (1 subgoal):
 1. \<And>P E e s0 v s1 es evs s2 vs ex es' Copt M. \<lbrakk>P,E \<turnstile> \<langle>e,s0\<rangle> \<Rightarrow> \<langle>Val v,s1\<rangle>; P,E \<turnstile> \<langle>es,s1\<rangle> [\<Rightarrow>] \<langle>evs,s2\<rangle>; map_val2 evs vs (throw ex # es')\<rbrakk> \<Longrightarrow> P,E \<turnstile> \<langle>es,s1\<rangle> [\<Rightarrow>] \<langle>map Val (?vs707 P E e s0 v s1 es evs s2 vs ex es' Copt M) @ throw ex # ?es'707 P E e s0 v s1 es evs s2 vs ex es' Copt M,s2\<rangle>
[PROOF STEP]
apply(simp add: map_val2_conv[symmetric])
[PROOF STATE]
proof (prove)
goal:
No subgoals!
[PROOF STEP]
done