/*******************************************************************************************************************************
 * arch/arm/src/efm32/hardware/efm32_romtable.h
 *
 *  Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
 *
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 *    misrepresented as being the original software.@n
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 * has no obligation to support this Software. Silicon Laboratories, Inc. is
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 * Silicon Laboratories, Inc. will not be liable for any consequential,
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 *
 *   Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
 *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
 *   Authors: Pierre-noel Bouteville <pnb990@gmail.com>
 *            Gregory Nutt <gnutt@nuttx.org>
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 *******************************************************************************************************************************/

#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ROMTABLE_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ROMTABLE_H

/*******************************************************************************************************************************
 * Included Files
 *******************************************************************************************************************************/

#include <nuttx/config.h>
#include "hardware/efm32_memorymap.h"

#if !defined(CONFIG_EFM32_EFM32GG)
#  warning This is the EFM32GG header file; Review/modification needed for this architecture
#endif

/*******************************************************************************************************************************
 * Pre-processor Definitions
 *******************************************************************************************************************************/

#define ROMTABLE ((const struct efm32_romtable_s *)EFM32_ROMTABLE_BASE)

/* Bit fields for struct efm32_romtable_s */

#define _ROMTABLE_PID0_FAMILYLSB_MASK       0x000000C0UL /* Least Significant Bits [1:0] of CHIP FAMILY, mask */
#define _ROMTABLE_PID0_FAMILYLSB_SHIFT      6            /* Least Significant Bits [1:0] of CHIP FAMILY, shift */
#define _ROMTABLE_PID0_REVMAJOR_MASK        0x0000003FUL /* CHIP MAJOR Revision, mask */
#define _ROMTABLE_PID0_REVMAJOR_SHIFT       0            /* CHIP MAJOR Revision, shift */

#define _ROMTABLE_PID1_FAMILYMSB_MASK       0x0000000FUL /* Most Significant Bits [5:2] of CHIP FAMILY, mask */
#define _ROMTABLE_PID1_FAMILYMSB_SHIFT      0            /* Most Significant Bits [5:2] of CHIP FAMILY, shift */

#define _ROMTABLE_PID2_REVMINORMSB_MASK     0x000000F0UL /* Most Significant Bits [7:4] of CHIP MINOR revision, mask */
#define _ROMTABLE_PID2_REVMINORMSB_SHIFT    4            /* Most Significant Bits [7:4] of CHIP MINOR revision, mask */

#define _ROMTABLE_PID3_REVMINORLSB_MASK     0x000000F0UL /* Least Significant Bits [3:0] of CHIP MINOR revision, mask */
#define _ROMTABLE_PID3_REVMINORLSB_SHIFT    4            /* Least Significant Bits [3:0] of CHIP MINOR revision, shift */

/*******************************************************************************************************************************
 * Public Type Definitions
 *******************************************************************************************************************************/

struct efm32_romtable_s
{
  const uint32_t pid4; /* JEP_106_BANK */
  const uint32_t pid5; /* Unused */
  const uint32_t pid6; /* Unused */
  const uint32_t pid7; /* Unused */
  const uint32_t pid0; /* Chip family LSB, chip major revision */
  const uint32_t pid1; /* JEP_106_NO, Chip family MSB */
  const uint32_t pid2; /* Chip minor rev MSB, JEP_106_PRESENT, JEP_106_NO */
  const uint32_t pid3; /* Chip minor rev LSB */
  const uint32_t cid0; /* Unused */
};

#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ROMTABLE_H */
